SF V490 - Need Help URGENT
807557Jun 8 2008 — edited Apr 18 2010Dear All,
This is the error when POST is run.
The System (A52-CLH4C232GTB) Serial # : ############
PO reference :- ORB55
The failed Board (CPU/Memory Board w/2 � USIV+ 1.5GHz, 16GB (16 � 1GB DIMMs)Memory) serial number is : ####################
THIS IS THE ERROR MESSAGE THAT THE CLIENT HAS RECORDED:-
ERROR: (0100) No FRU Detected
FATAL: UNSUPPORTED CONFIGURATION
Power Distribution Board incorrect for Ultra IV/IV+ support
FATAL: UNSUPPORTED CONFIGURATION
Power Supply 0 incorrect for Ultra IV/IV+ support
FATAL: UNSUPPORTED CONFIGURATION
Power Supply 1 incorrect for Ultra IV/IV+ support
FATAL: UNSUPPORTED CONFIGURATION
Power Supply 2 incorrect for Ultra IV/IV+ support
Probing core system FRUs..
FATAL: I2C segment 5 bus is not operational.
The system cannot be correctly probed and configured.
ERROR: (0100) No FRU Detected
ERROR: CPU0/2Can't read GP2 Slot Status/Control
ERROR: CPU1/3Can't read GP2 Slot Status/Control
ERROR: CPU2/4Can't read GP2 Slot Status/Control
ERROR: CPU3/5Can't read GP2 Slot Status/Control
FATAL: Errors encountered in core system config probe
Configuration error mask 0000.0000.0000.00ff
ERROR: (0100) No FRU Detected
FATAL: UNSUPPORTED CONFIGURATION
Power Distribution Board incorrect for Ultra IV/IV+ support
FATAL: UNSUPPORTED CONFIGURATION
Power Supply 0 incorrect for Ultra IV/IV+ support
FATAL: UNSUPPORTED CONFIGURATION
Power Supply 1 incorrect for Ultra IV/IV+ support
FATAL: UNSUPPORTED CONFIGURATION
Power Supply 2 incorrect for Ultra IV/IV+ support
ERROR: (0100) No FRU Detected
FATAL: UNSUPPORTED CONFIGURATION
Power Distribution Board incorrect for Ultra IV/IV+ support
FATAL: UNSUPPORTED CONFIGURATION
Power Supply 0 incorrect for Ultra IV/IV+ support
FATAL: UNSUPPORTED CONFIGURATION
Power Supply 1 incorrect for Ultra IV/IV+ support
FATAL: UNSUPPORTED CONFIGURATION
Power Supply 2 incorrect for Ultra IV/IV+ support
ERROR: chkpost: Problems with I2C; forcing POST call w/%o0 = 0000.0000.0101.4041
Executing POST w/%o0 = 0000.0000.0101.4041
0:0>
0:0>@(#)Sun Fire[TM] V880/V890 POST 4.22.34 2007/07/23 13:11
/export/delivery/delivery/4.22/4.22.34/post4.22.x/Camelot/daktari/integrated (root)
0:0>Copyright 2007 Sun Microsystems, Inc. All rights reserved
0:0>Jump from OBP->POST.
0:0>diag-switch? configuration variable set TRUE.
0:0>Diag level set to MAX.
0:0>MFG scrpt mode set NORM
0:0>I/O port set to serial TTYA.
0:0>
0:0>Start selftest...
0:0>Parking core 1
2:0>Parking core 1
0:0>CPUs present in system: 0:0 2:0
0:0>Test CPU(s).....
0:0>Init CPU
0:0> UltraSparc_IV+ Version 2.1
0:0>DMMU Registers Access
0:0>DMMU TLB DATA RAM Access
0:0>DMMU TLB TAGS Access
0:0>IMMU Registers Access
0:0>IMMU TLB DATA RAM Access
0:0>IMMU TLB TAGS Access
0:0>L2 Cache Enable
0:0>L2 cache Data Bitwalk
0:0>L2 cache Address Bitwalk
0:0>Probe L3 cache
0:0> Size = 00000000.02000000...
0:0>L3 cache Data Bitwalk
0:0>L3 cache Address Bitwalk
0:0>Scrub and Setup L3 cache
0:0>Parking core 1
0:0>Setup and Enable DMMU
0:0>Setup DMMU Miss Handler
0:0>Test and Init Temp Mailbox
2:0>Init CPU
2:0> UltraSparc_IV+ Version 2.1
2:0>DMMU Registers Access
2:0>DMMU TLB DATA RAM Access
2:0>DMMU TLB TAGS Access
2:0>IMMU Registers Access
2:0>IMMU TLB DATA RAM Access
2:0>IMMU TLB TAGS Access
2:0>L2 Cache Enable
2:0>L2 cache Data Bitwalk
2:0>L2 cache Address Bitwalk
2:0>Probe L3 cache
2:0> Size = 00000000.02000000...
2:0>L3 cache Data Bitwalk
2:0>L3 cache Address Bitwalk
2:0>Scrub and Setup L3 cache
2:0>Parking core 1
2:0>Setup and Enable DMMU
2:0>Setup DMMU Miss Handler
2:0>Test and Init Temp Mailbox
0:0>Init Scan/I2C.....
0:0>Initializing Scan Database
0:0>Mask DAR errors off
0:0>Init MDR DTL
0:0>Init DAR DTL
0:0>Enable Partial DAR error
0:0>Init DCS DTL
0:0>Init I2C
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>INFO: I2C SEG5 init Failed. Trying Again
0:0>
0:0>ERROR: TEST = Init I2C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = I2C Timed Out
0:0>END_ERROR
0:0>
0:0>WARNING: TEST = Init I2C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = ERROR: I2C Error
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Init I2C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = ERROR: I2C Error
0:0>END_WARNING
0:0>
0:0>ERROR: TEST = Init I2C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG =
*** Test Failed!! ***
0:0>END_ERROR
0:0>Unquiesce Safari
0:0>Margin all voltages to nominal
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 1.5V to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting Motherboard 1.5V to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 3.3V to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 2.5V to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 0 Voltage to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 1 Voltage to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 2 Voltage to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 3 Voltage to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 4 Voltage to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 5 Voltage to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 6 Voltage to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = Error setting CPU 7 Voltage to nominal!.
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = ERROR: I2C Error
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = ERROR: I2C Error
0:0>END_WARNING
0:0>
0:0>ERROR: TEST = Margin all voltages to nominal
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG =
*** Test Failed!! ***
0:0>END_ERROR
0:0>Scan ring integrity
0:0>
0:0>INFO: H/W under test = CPU Board Slot B (CPU 1, DCDS [0-7], SRAMs) Scan Ring NOT Present or Shut OFF
0:0>
0:0>INFO: H/W under test = CPU Board Slot B (CPU 3, SRAMs) Scan Ring NOT Present or Shut OFF
0:0>
0:0>INFO: H/W under test = CPU Board Slot C (CPU 4, DCDS [0-7], SRAMs) Scan Ring NOT Present or Shut OFF
0:0>
0:0>INFO: H/W under test = CPU Board Slot D (CPU 5, DCDS [0-7], SRAMs) Scan Ring NOT Present or Shut OFF
0:0>
0:0>INFO: H/W under test = CPU Board Slot C (CPU 6, SRAMs) Scan Ring NOT Present or Shut OFF
0:0>
0:0>INFO: H/W under test = CPU Board Slot D (CPU 7, SRAMs) Scan Ring NOT Present or Shut OFF
0:0>Set Trip Temp CPU 0 to 110C
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>INFO: I2C Device access failed. Trying Again
0:0>
0:0>ERROR: TEST = Set Trip Temp CPU 0 to 110C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = I2C Timed Out
0:0>END_ERROR
0:0>
0:0>WARNING: TEST = Set Trip Temp CPU 0 to 110C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = ERROR: I2C Error
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Set Trip Temp CPU 0 to 110C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = ERROR: I2C Error
0:0>END_WARNING
0:0>
0:0>ERROR: TEST = Set Trip Temp CPU 0 to 110C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG =
*** Test Failed!! ***
0:0>END_ERROR
0:0>
0:0>ERROR: TEST = Set Trip Temp CPU 0 to 110C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = ERROR: Fatal CPU error on master, rolling over to new master.
0:0>END_ERROR
0:0>
0:0>WARNING: TEST = Set Trip Temp CPU 0 to 110C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = ERROR: I2C Error
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Set Trip Temp CPU 0 to 110C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = ERROR: I2C Error
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Set Trip Temp CPU 0 to 110C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = ERROR: I2C Error
0:0>END_WARNING
0:0>
0:0>WARNING: TEST = Set Trip Temp CPU 0 to 110C
0:0>H/W under test = Motherboard/Centerplane I2C
0:0>MSG = ERROR: I2C Error
0:0>END_WARNING
2:0>Soft Reset.
2:0>
2:0>WARNING: TEST = Power on Reset Initialization
2:0>H/W under test = CPU0 Basic, Motherboard/Centerplane
2:0>MSG = ERROR: I2C Error
2:0>END_WARNING
2:0>
2:0>WARNING: TEST = Power on Reset Initialization
2:0>H/W under test = CPU0 Basic, Motherboard/Centerplane
2:0>MSG = ERROR: I2C Error
2:0>END_WARNING
2:0>
2:0>WARNING: TEST = Power on Reset Initialization
2:0>H/W under test = CPU0 Basic, Motherboard/Centerplane
2:0>MSG = ERROR: I2C Error
2:0>END_WARNING
2:0>
2:0>WARNING: TEST = Power on Reset Initialization
2:0>H/W under test = CPU0 Basic, Motherboard/Centerplane
2:0>MSG = ERROR: I2C Error
2:0>END_WARNING
2:0>
2:0>ERROR: TEST = Power on Reset Initialization
2:0>H/W under test = CPU0 Basic, Motherboard/Centerplane
2:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
2:0>MSG = Watchdog timeout, Master CPU Failure on 0:0, rollover to 2:0.
2:0>END_ERROR
2:0>ERROR: No good CPUs left! Calling debug menu.
2:0>
2:0>WARNING: TEST = Power on Reset Initialization
2:0>H/W under test = CPU, Motherboard/Centerplane, I/O board, (system init)
2:0>MSG = ERROR: I2C Error
2:0>END_WARNING
2:0>
2:0>WARNING: TEST = Power on Reset Initialization
2:0>H/W under test = CPU, Motherboard/Centerplane, I/O board, (system init)
2:0>MSG = ERROR: I2C Error
2:0>END_WARNING
2:0>
2:0>WARNING: TEST = Power on Reset Initialization
2:0>H/W under test = CPU, Motherboard/Centerplane, I/O board, (system init)
2:0>MSG = ERROR: I2C Error
2:0>END_WARNING
2:0>
2:0>WARNING: TEST = Power on Reset Initialization
2:0>H/W under test = CPU, Motherboard/Centerplane, I/O board, (system init)
2:0>MSG = ERROR: I2C Error
2:0>END_WARNING
2:0> 0 Peek/Poke interface
2:0> 1 Dump DAR Error Bits
2:0> 2 Dump Scan Chain
2:0> 3 Dump CPU Regs
2:0> 4 Dump BBC Regs
2:0> 5 Dump Mem Controller Regs
2:0> 6 Dump Valid DMMU entries
2:0> 7 Dump IMMU entries
2:0> 8 Dump Struct Info
2:0> 9 Dump Mailbox
2:0> a Dump IO-Bridge regs unit 0
2:0> b Dump IO-Bridge regs unit 1
2:0> c Allow other CPUs to print
2:0> d Do soft reset
2:0> ? Help
2:0>
2:0>Selection: